The present invention relates to generating signals with specified frequencies, and in particular, to circuits and methods for generating high frequency signals.
Many electronic systems require signals at a variety of different frequencies to perform a variety of different functions. In many situations, a system will include some reference frequency (sometimes referred to as the system frequency). An example of such a reference frequency is a system clock. The reference frequency often provides the foundation timing reference for the system. However, many system components and subsystems may require different frequency signals to operate properly. In many cases, subsystem frequencies may vary drastically from the reference, or may have different tolerances or other unique requirements that the reference frequency cannot meet. Thus, frequency generation, which is sometimes referred to as frequency synthesis, is an important consideration in the design and development of electronic systems.
FIG. 1 is an example of a circuit commonly used to generate different frequencies based on a reference frequency. FIG. 1 illustrates a phase-locked loop (“PLL”) approach to frequency synthesis. PLL 100 receives a reference frequency (“Ref”) and generates an output frequency (“fout”) that has some relation to REF. For example, PLL 100 includes a phase-detector 110 (“PD”), or equivalently, a phase frequency detector (“PFD”), a charge pump 120, a loop filter 130, a voltage controlled oscillator 140 (“VCO”) and a feedback circuit 150, which in this case is a divider. Divider 150 generates a feedback signal (“fFB”) having a frequency that is some fraction of the VCO output frequency (“fout”). By the action of the loop, the outputs of the phase detector, charge pump and loop filter generate a control voltage to the VCO that results in a feedback signal that is at the same frequency as REF. The output frequency of the VCO, which may also be the output of the synthesizer, is thus some multiple of the reference signal frequency.
While the approach illustrated in FIG. 1 works well in many applications, there are some applications where such an architecture is inadequate. For example, some applications may require many different frequencies for particular subsystems. FIG. 2 illustrates one application where multiple frequency synthesis is required. FIG. 2 illustrates frequency bands that may be used to transmit information in a channel (e.g., a wireless channel). In this example, there are three channels 201, 202, and 203. Thus, the subsystem used for modulating the signals into the channel would require three different carrier frequencies f1, f2 and f3 to transfer information in each channel.
One example approach to multi-band transmission that illustrates one of the problems with standard synthesizers is shown in FIG. 3. FIG. 3 shows a transmission scheme of a wireless system. At 301 the system may lock onto the first frequency f1. At 302, the system may transfer data in the channel with f1 being the modulation frequency. At 303, the system may change channels, and the synthesizer must change to a new frequency f2. At 304, the system may transfer data in the new channel with f2 being the new modulation frequency. While a single PLL synthesizer is beneficial from the perspective of efficiency and cost (i.e., it reduces power consumption and the size of the circuit), such a synthesizer must be able to change frequencies between each transmission. These frequency changes are sometimes referred to as “channel hopping.” Such an implementation may not work at high frequencies where the channel hopping requirements may become too stringent for the PLL. For example, some systems may require that the PLL switch between frequencies in less than 10 ns.
FIG. 4 illustrates one possible approach to meet stringent channel hopping requirements. FIG. 4 includes one PLL for each channel, wherein each PLL generates a different modulation frequency for use in each channel. In this case, any one of the three PLLs 401-403 may be selected using a multiplexer 404 (“MUX”), and the output of the MUX is used to modulate the signal being transmitted. While this approach may meet the stringent channel hopping requirements (i.e., because the PLLs do not change frequency), it is nevertheless less desirable than a signal PLL solution because it consumes more power requires about three times the circuit area. Moreover, if multiple PLLs are included on a single integrated circuit, the crosstalk of the circuit will increase from the activity of the multiple PLLs.
Thus, there is a need for improved frequency synthesizer techniques that can effectively generate frequencies in a multi-frequency environment.